The present invention relates, in general, to electronics, and more particularly, to methods of forming semiconductor packages and leadframes.
In the past, the electronics industry utilized various methods and structures to form leadframes for semiconductor packages. Of particular interest was leadframes for QFN packages. QFN packages typically were very small and had a connection pad on a bottom surface of the semiconductor package. In some cases, a right angle mold-lock feature was formed at a corner or edge of the connection pad in order to assist in creating a firm attachment to the encapsulating compound that was used to form the package. One problem with these leadframes and packages was cost. Typically, etching techniques had to be used to form the leadframes because the right angle mold-lock feature could not reliably be formed with the prior stamping techniques. The etching techniques were expensive and slow and resulted in high manufacturing costs.
Accordingly, it is desirable to have a leadframe that has a reliable mold-lock, that is formed by a non-etching techniques, and that has a low cost.
For simplicity and clarity of illustration, elements in the figures are not necessarily to scale, and the same reference numbers in different figures denote the same elements. Additionally, descriptions and details of well known steps and elements are omitted for simplicity of the description.